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The History of Boundary Scan

Boundary Scan JTAG History

The History of Boundary Scan

by admin

Boundary Scan was developed as a solution to difficultly in placing test points on modern circuit boards brought on by the ever increasing board complexity and decreasing size of modern electronic circuits.

Systems Get Smaller

As technology advanced, chips got smaller, more tightly packed, and new package technologies, such as Ball Grid Arrays (BGAs), were created to allow more and more devices to be placed on smaller and smaller footprints.

These advances made it increasingly difficult to place test points on a board, rendering traditional methods of testing  like In-circuit Test or, ICT  less and less effective.

To help deal with these problems, a group of US and European companies was formed to look at new ways to test these new boards and systems.

Joint Test Access Group (JTAG)  is Born

The consortium of companies came to be know as the Joint Test Action Group or JTAG for short. This group created a specification for on-chip test that would later be known as IEEE 1149.1.  The specification was intended to provide a standard way to do “pins out” testing where each IC pin could become a virtual test point when the chip was placed in a special test mode. Using a published standard helped to enable multiple tools vendors to create test products that could be used in all phases of board design and test.

Evolution of the JTAG Specification

Later additions to the family of specifications included: 1149.4 for Analog testing  (not popular) and  IEEE 1149.6 for AC coupled signals (gaining popularity).

Many modern IC Chips support Boundary Scan testing and as such adhere to the IEEE 1149.1 Specification. To meet the specification, vendors must include a Boundary Scan Definition Language File (BSDL) that describes the chip’s support for the standard.

Boundary Scan

Boundary Scan Technology and Resources

Boundary Scan Technology and Resources post image

Thank you for visiting  BoundarySCAN.ORG, the one stop source for Boundary SCAN Test information.

The BOUNDARY SCAN Team has many years of experience creating BOUNDARY SCAN applications for Chip, Board and System Level test.
We created BOUNDARYSCAN.ORG to share our experience and to help you select the right BOUNDARY SCAN solution for your needs. To that end, we have included:

  • Jtag Boundary SCAN Product Reviews
  • Technical Articles
  • White Papers, Reports and Resources

We hope you will come to use this site as an ever evolving resource for all things BOUNDARY SCAN.

Thank You for visiting and please let us know in the comments what you would like to see or any questions you may have.
The Boundary SCAN Team

Boundary SCAN Open Source


Open Source Boundary SCAN

Until a few years ago their were no good open source Boundary SCAN products available. In the last few years, the The Open On-Chip Debugger (OpenOCD) project has changed that a bit.

The OpenOCD project is an open source project that supports low end hardware cables. The stated goal of the project is  to provide debugging, in-system programming and boundary-scan testing for ARM and MIPS processors.

Specifically it supports:

  • The ability to Play SVF files (only the XIlinx variant XSVF is supported) to send test vectors to the pins of a boundary SCAN device and to read the value of the pins back. SVF can also be used to do device programming.
  • The ability to use a low level command set or API to control the JTAG state machine and attendant signals (TDI, TDO, TCK, TMS, TRST). This low-level interface, though, tedious, can be used to do just about anything that is possible with JTAG.
  • The ability to program some FLASH and CPLD/FPGA devices.
  • The ability to debug embedded firmware using GDB based debuggers like Eclipse, Insight and DDD.

I consider this to be pretty good news for people who want to learn more about how JTAG Boundary SCAN works. If you want to see how to do something , just grab the sources for this project and you will have a great resource from which to learn.

Their are a couple of issues with these types of tools that would keep me from using it on a mission-critical production line:

  • It works with Low-Price, Low end tools so their is a chance that the quality and support may not be there. It may be OK, but again, I don’t think I would trust it for high volume production.
  • The second issue is that lots of hardware cables are supported. While this probably means that the system is fairly well tested, it also means that the testing is more complex and prone to error.
  • SVF and The Low-Level API are not efficient ways to develop complex tests needed for modern production test environments as compared to the powerful environments provided by commercial tools.

Here is a link to the OpenOCD project Documentation. Take a look, kick the tires, and let me know what you think in the comments section.

The Boundary SCAN ORG Team

Open Source JTAG Boundary Scan Tools